All it takes is one word and four letters to make most developers zone out: F-P-G-A.

FPGAs are among the most versatile technologies available on the market today, but capitalizing on that versatility means learning hardware description languages like VHDL or Verilog, different requirements in terms of board design and routing, and how all of that impacts software development.

But don't knock it before you try it. In this DevHeads Demo, Navadeep Ganesh (Discord handle @ngu25) shows us how to implement synchronous and asynchronous finite state machines (FSMs) on FPGA fabric using the Verilog HDL. The demo uses an AMD Zynq 7020, but the Verilog code is available on the DevHeads GitHub and can be adapted for other FPGA targets as well.

Join the DevHeads IoT Integration Server and learn how you can leverage the performance and flexibility of FPGAs.

Join our Community:   / discord  
In-Server DevHeads Expert: @ngu25
GitHub Repo: https://github.com/DevHeadsCommunity